JitArm64: Pass index to more Arm64GPRCache functions

This refactorization is needed for upcoming commits.
This commit is contained in:
JosJuice 2024-09-01 15:45:23 +02:00
parent 502317a485
commit 7065b93ba5
2 changed files with 21 additions and 19 deletions

View File

@ -137,12 +137,6 @@ void Arm64RegCache::DiscardRegister(size_t preg)
UnlockRegister(host_reg); UnlockRegister(host_reg);
} }
// GPR Cache
constexpr size_t GUEST_GPR_COUNT = 32;
constexpr size_t GUEST_CR_COUNT = 8;
constexpr size_t GUEST_GPR_OFFSET = 0;
constexpr size_t GUEST_CR_OFFSET = GUEST_GPR_COUNT;
Arm64GPRCache::Arm64GPRCache() : Arm64RegCache(GUEST_GPR_COUNT + GUEST_CR_COUNT) Arm64GPRCache::Arm64GPRCache() : Arm64RegCache(GUEST_GPR_COUNT + GUEST_CR_COUNT)
{ {
} }
@ -273,8 +267,8 @@ void Arm64GPRCache::FlushRegisters(BitSet32 regs, FlushMode mode, ARM64Reg tmp_r
const size_t ppc_offset = GetGuestByIndex(i).ppc_offset; const size_t ppc_offset = GetGuestByIndex(i).ppc_offset;
if (ppc_offset <= 252) if (ppc_offset <= 252)
{ {
ARM64Reg RX1 = reg1_zero ? ARM64Reg::WZR : R(GetGuestByIndex(i)); ARM64Reg RX1 = reg1_zero ? ARM64Reg::WZR : BindForRead(i);
ARM64Reg RX2 = reg2_zero ? ARM64Reg::WZR : R(GetGuestByIndex(i + 1)); ARM64Reg RX2 = reg2_zero ? ARM64Reg::WZR : BindForRead(i + 1);
m_emit->STP(IndexType::Signed, RX1, RX2, PPC_REG, u32(ppc_offset)); m_emit->STP(IndexType::Signed, RX1, RX2, PPC_REG, u32(ppc_offset));
if (flush_all) if (flush_all)
{ {
@ -335,8 +329,9 @@ void Arm64GPRCache::Flush(FlushMode mode, ARM64Reg tmp_reg,
FlushCRRegisters(BitSet8(0xFF), mode, tmp_reg, ignore_discarded_registers); FlushCRRegisters(BitSet8(0xFF), mode, tmp_reg, ignore_discarded_registers);
} }
ARM64Reg Arm64GPRCache::R(const GuestRegInfo& guest_reg) ARM64Reg Arm64GPRCache::BindForRead(size_t index)
{ {
GuestRegInfo guest_reg = GetGuestByIndex(index);
OpArg& reg = guest_reg.reg; OpArg& reg = guest_reg.reg;
size_t bitsize = guest_reg.bitsize; size_t bitsize = guest_reg.bitsize;
@ -378,8 +373,9 @@ ARM64Reg Arm64GPRCache::R(const GuestRegInfo& guest_reg)
return ARM64Reg::INVALID_REG; return ARM64Reg::INVALID_REG;
} }
void Arm64GPRCache::SetImmediate(const GuestRegInfo& guest_reg, u32 imm, bool dirty) void Arm64GPRCache::SetImmediateInternal(size_t index, u32 imm, bool dirty)
{ {
GuestRegInfo guest_reg = GetGuestByIndex(index);
OpArg& reg = guest_reg.reg; OpArg& reg = guest_reg.reg;
if (reg.GetType() == RegType::Register) if (reg.GetType() == RegType::Register)
UnlockRegister(EncodeRegTo32(reg.GetReg())); UnlockRegister(EncodeRegTo32(reg.GetReg()));
@ -387,8 +383,9 @@ void Arm64GPRCache::SetImmediate(const GuestRegInfo& guest_reg, u32 imm, bool di
reg.SetDirty(dirty); reg.SetDirty(dirty);
} }
void Arm64GPRCache::BindToRegister(const GuestRegInfo& guest_reg, bool will_read, bool will_write) void Arm64GPRCache::BindForWrite(size_t index, bool will_read, bool will_write)
{ {
GuestRegInfo guest_reg = GetGuestByIndex(index);
OpArg& reg = guest_reg.reg; OpArg& reg = guest_reg.reg;
const size_t bitsize = guest_reg.bitsize; const size_t bitsize = guest_reg.bitsize;

View File

@ -328,15 +328,15 @@ public:
// Returns a guest GPR inside of a host register. // Returns a guest GPR inside of a host register.
// Will dump an immediate to the host register as well. // Will dump an immediate to the host register as well.
Arm64Gen::ARM64Reg R(size_t preg) { return R(GetGuestGPR(preg)); } Arm64Gen::ARM64Reg R(size_t preg) { return BindForRead(GUEST_GPR_OFFSET + preg); }
// Returns a guest CR inside of a host register. // Returns a guest CR inside of a host register.
Arm64Gen::ARM64Reg CR(size_t preg) { return R(GetGuestCR(preg)); } Arm64Gen::ARM64Reg CR(size_t preg) { return BindForRead(GUEST_CR_OFFSET + preg); }
// Set a register to an immediate. Only valid for guest GPRs. // Set a register to an immediate. Only valid for guest GPRs.
void SetImmediate(size_t preg, u32 imm, bool dirty = true) void SetImmediate(size_t preg, u32 imm, bool dirty = true)
{ {
SetImmediate(GetGuestGPR(preg), imm, dirty); SetImmediateInternal(GUEST_GPR_OFFSET + preg, imm, dirty);
} }
// Returns if a register is set as an immediate. Only valid for guest GPRs. // Returns if a register is set as an immediate. Only valid for guest GPRs.
@ -374,14 +374,14 @@ public:
// flushed. Just remember to call this function again with will_write = true after the Flush call. // flushed. Just remember to call this function again with will_write = true after the Flush call.
void BindToRegister(size_t preg, bool will_read, bool will_write = true) void BindToRegister(size_t preg, bool will_read, bool will_write = true)
{ {
BindToRegister(GetGuestGPR(preg), will_read, will_write); BindForWrite(GUEST_GPR_OFFSET + preg, will_read, will_write);
} }
// Binds a guest CR to a host register, optionally loading its value. // Binds a guest CR to a host register, optionally loading its value.
// The description of BindToRegister above applies to this function as well. // The description of BindToRegister above applies to this function as well.
void BindCRToRegister(size_t preg, bool will_read, bool will_write = true) void BindCRToRegister(size_t preg, bool will_read, bool will_write = true)
{ {
BindToRegister(GetGuestCR(preg), will_read, will_write); BindForWrite(GUEST_CR_OFFSET + preg, will_read, will_write);
} }
BitSet32 GetCallerSavedUsed() const override; BitSet32 GetCallerSavedUsed() const override;
@ -428,14 +428,19 @@ private:
GuestRegInfo GetGuestCR(size_t preg); GuestRegInfo GetGuestCR(size_t preg);
GuestRegInfo GetGuestByIndex(size_t index); GuestRegInfo GetGuestByIndex(size_t index);
Arm64Gen::ARM64Reg R(const GuestRegInfo& guest_reg); Arm64Gen::ARM64Reg BindForRead(size_t index);
void SetImmediate(const GuestRegInfo& guest_reg, u32 imm, bool dirty); void SetImmediateInternal(size_t index, u32 imm, bool dirty);
void BindToRegister(const GuestRegInfo& guest_reg, bool will_read, bool will_write = true); void BindForWrite(size_t index, bool will_read, bool will_write = true);
void FlushRegisters(BitSet32 regs, FlushMode mode, Arm64Gen::ARM64Reg tmp_reg, void FlushRegisters(BitSet32 regs, FlushMode mode, Arm64Gen::ARM64Reg tmp_reg,
IgnoreDiscardedRegisters ignore_discarded_registers); IgnoreDiscardedRegisters ignore_discarded_registers);
void FlushCRRegisters(BitSet8 regs, FlushMode mode, Arm64Gen::ARM64Reg tmp_reg, void FlushCRRegisters(BitSet8 regs, FlushMode mode, Arm64Gen::ARM64Reg tmp_reg,
IgnoreDiscardedRegisters ignore_discarded_registers); IgnoreDiscardedRegisters ignore_discarded_registers);
static constexpr size_t GUEST_GPR_COUNT = 32;
static constexpr size_t GUEST_CR_COUNT = 8;
static constexpr size_t GUEST_GPR_OFFSET = 0;
static constexpr size_t GUEST_CR_OFFSET = GUEST_GPR_COUNT;
}; };
class Arm64FPRCache : public Arm64RegCache class Arm64FPRCache : public Arm64RegCache