From 02f0921b2da2a2f88841f9a001a4a4675f5e61b1 Mon Sep 17 00:00:00 2001 From: refractionpcsx2 Date: Sat, 22 Nov 2025 07:39:17 +0000 Subject: [PATCH] EE: Force sync on EE timer read --- pcsx2/Interpreter.cpp | 4 +-- pcsx2/R5900.h | 1 + pcsx2/R5900OpcodeImpl.cpp | 35 +++++++++++++++++++++++++++ pcsx2/x86/ix86-32/iR5900LoadStore.cpp | 12 +++++++++ 4 files changed, 50 insertions(+), 2 deletions(-) diff --git a/pcsx2/Interpreter.cpp b/pcsx2/Interpreter.cpp index d1ba1f8679..16f848a6be 100644 --- a/pcsx2/Interpreter.cpp +++ b/pcsx2/Interpreter.cpp @@ -24,7 +24,7 @@ static bool intExitExecution = false; static fastjmp_buf intJmpBuf; static u32 intLastBranchTo; -static void intEventTest(); +void intEventTest(); void intUpdateCPUCycles() { @@ -548,7 +548,7 @@ static void intReset() branch2 = 0; } -static void intEventTest() +void intEventTest() { // Perform counters, ints, and IOP updates: _cpuEventTest_Shared(); diff --git a/pcsx2/R5900.h b/pcsx2/R5900.h index b786b54842..3e8e1143e5 100644 --- a/pcsx2/R5900.h +++ b/pcsx2/R5900.h @@ -283,6 +283,7 @@ static fpuRegisters& fpuRegs = _cpuRegistersPack.fpuRegs; extern bool eeEventTestIsActive; void intUpdateCPUCycles(); +void intEventTest(); void intSetBranch(); // This is a special form of the interpreter's doBranch that is run from various diff --git a/pcsx2/R5900OpcodeImpl.cpp b/pcsx2/R5900OpcodeImpl.cpp index 4727dfad81..a8943c5a7b 100644 --- a/pcsx2/R5900OpcodeImpl.cpp +++ b/pcsx2/R5900OpcodeImpl.cpp @@ -524,6 +524,13 @@ void LB() if (!_Rt_) return; cpuRegs.GPR.r[_Rt_].SD[0] = temp; + + // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. + if ((addr & 0xFFFFE0000) == 0x10000000) + { + intUpdateCPUCycles(); + intEventTest(); + } } void LBU() @@ -533,6 +540,13 @@ void LBU() if (!_Rt_) return; cpuRegs.GPR.r[_Rt_].UD[0] = temp; + + // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. + if ((addr & 0xFFFFE0000) == 0x10000000) + { + intUpdateCPUCycles(); + intEventTest(); + } } void LH() @@ -546,6 +560,13 @@ void LH() if (!_Rt_) return; cpuRegs.GPR.r[_Rt_].SD[0] = temp; + + // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. + if ((addr & 0xFFFFE0000) == 0x10000000) + { + intUpdateCPUCycles(); + intEventTest(); + } } void LHU() @@ -559,6 +580,13 @@ void LHU() if (!_Rt_) return; cpuRegs.GPR.r[_Rt_].UD[0] = temp; + + // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. + if ((addr & 0xFFFFE0000) == 0x10000000) + { + intUpdateCPUCycles(); + intEventTest(); + } } void LW() @@ -572,6 +600,13 @@ void LW() if (!_Rt_) return; cpuRegs.GPR.r[_Rt_].SD[0] = (s32)temp; + + // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. + if ((addr & 0xFFFFE0000) == 0x10000000) + { + intUpdateCPUCycles(); + intEventTest(); + } } void LWU() diff --git a/pcsx2/x86/ix86-32/iR5900LoadStore.cpp b/pcsx2/x86/ix86-32/iR5900LoadStore.cpp index 7f433de48d..36e155e0be 100644 --- a/pcsx2/x86/ix86-32/iR5900LoadStore.cpp +++ b/pcsx2/x86/ix86-32/iR5900LoadStore.cpp @@ -107,9 +107,15 @@ static void recLoad(u32 bits, bool sign) alloc_cb = []() { return _allocX86reg(X86TYPE_GPR, _Rt_, MODE_WRITE); }; int x86reg; + bool needs_flush = false; if (GPR_IS_CONST1(_Rs_)) { const u32 srcadr = g_cpuConstRegs[_Rs_].UL[0] + _Imm_; + + // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. + if (bits <= 32 && (srcadr & 0xFFFFE0000) == 0x10000000) + needs_flush = true; + x86reg = vtlb_DynGenReadNonQuad_Const(bits, sign, false, srcadr, alloc_cb); } else @@ -127,6 +133,12 @@ static void recLoad(u32 bits, bool sign) pxAssert(!_Rt_ || !GPR_IS_CONST1(_Rt_)); if (!_Rt_) _freeX86reg(x86reg); + + if (bits <= 32 && needs_flush) + { + iFlushCall(FLUSH_INTERPRETER); + g_branch = 2; + } } //////////////////////////////////////////////////////////////////////////////////////////