mirror of
https://github.com/PCSX2/pcsx2.git
synced 2025-12-16 04:08:48 +00:00
Formatting: Clean up some if spaces
This commit is contained in:
parent
62cbd44933
commit
2d03b21f2b
@ -1455,7 +1455,7 @@ static uint cdvdStartSeek(uint newsector, CDVD_MODE_TYPE mode, bool transition_t
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}
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}
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isSeeking = true;
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isSeeking = true;
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}
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}
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else if(!drive_speed_change_cycles)
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else if (!drive_speed_change_cycles)
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{
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{
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CDVD_LOG("CdSeek Begin > Contiguous block without seek - delta=%d sectors", delta);
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CDVD_LOG("CdSeek Begin > Contiguous block without seek - delta=%d sectors", delta);
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@ -222,7 +222,7 @@ bool IOCtlSrc::ReadDVDInfo()
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{
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{
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Console.Warning("IOCTL_DVD_READ_STRUCTURE not supported");
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Console.Warning("IOCTL_DVD_READ_STRUCTURE not supported");
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}
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}
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else if(GetLastError() != ERROR_UNRECOGNIZED_MEDIA) // ERROR_UNRECOGNIZED_MEDIA means probably a CD or no disc
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else if (GetLastError() != ERROR_UNRECOGNIZED_MEDIA) // ERROR_UNRECOGNIZED_MEDIA means probably a CD or no disc
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{
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{
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Console.Warning("IOCTL Unknown Error %d", GetLastError());
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Console.Warning("IOCTL Unknown Error %d", GetLastError());
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}
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}
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@ -236,7 +236,7 @@ static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
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cpuClearInt( 10 );
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cpuClearInt( 10 );
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QueuedDMA._u16 &= ~(1 << 10); //Clear any queued DMA requests for this channel
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QueuedDMA._u16 &= ~(1 << 10); //Clear any queued DMA requests for this channel
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}
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}
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else if(channel == 2)
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else if (channel == 2)
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{
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{
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cpuClearInt( 11 );
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cpuClearInt( 11 );
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QueuedDMA._u16 &= ~(1 << 11); //Clear any queued DMA requests for this channel
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QueuedDMA._u16 &= ~(1 << 11); //Clear any queued DMA requests for this channel
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@ -274,7 +274,7 @@ static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
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{
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{
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func();
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func();
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}
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}
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else if(reg.chcr.STR)
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else if (reg.chcr.STR)
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{
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{
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//DevCon.Warning(L"32bit %s DMA Start while DMAC Disabled\n", ChcrName(mem));
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//DevCon.Warning(L"32bit %s DMA Start while DMAC Disabled\n", ChcrName(mem));
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QueuedDMA._u16 |= (1 << ChannelNumber(mem)); //Queue the DMA up to be started then the DMA's are Enabled and or the Suspend is lifted
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QueuedDMA._u16 |= (1 << ChannelNumber(mem)); //Queue the DMA up to be started then the DMA's are Enabled and or the Suspend is lifted
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@ -339,7 +339,7 @@ void GSClut::Read(const GIFRegTEX0& TEX0)
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break;
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break;
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}
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}
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}
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}
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else if(TEX0.CPSM == PSMCT16 || TEX0.CPSM == PSMCT16S)
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else if (TEX0.CPSM == PSMCT16 || TEX0.CPSM == PSMCT16S)
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{
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{
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switch(TEX0.PSM)
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switch(TEX0.PSM)
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{
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{
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@ -2260,7 +2260,7 @@ void GSState::Move()
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vm[doff] = (vm[doff] & 0xff000000) | (vm[soff] & 0x00ffffff);
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vm[doff] = (vm[doff] & 0xff000000) | (vm[soff] & 0x00ffffff);
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});
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});
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}
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}
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else // if(spsm.trbpp == 16)
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else // if (spsm.trbpp == 16)
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{
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{
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u16* vm = m_mem.vm16();
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u16* vm = m_mem.vm16();
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copy(dpo.assertSizesMatch(GSLocalMemory::swizzle16), spo.assertSizesMatch(GSLocalMemory::swizzle16), [vm](u32 doff, u32 soff)
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copy(dpo.assertSizesMatch(GSLocalMemory::swizzle16), spo.assertSizesMatch(GSLocalMemory::swizzle16), [vm](u32 doff, u32 soff)
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@ -4366,7 +4366,7 @@ void GSRendererHW::Draw()
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g_gs_device->StretchRect(g_texture_cache->GetTemporaryZ(), sRect, ds->m_texture, GSVector4(dRect), ShaderConvert::DEPTH_COPY, false);
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g_gs_device->StretchRect(g_texture_cache->GetTemporaryZ(), sRect, ds->m_texture, GSVector4(dRect), ShaderConvert::DEPTH_COPY, false);
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g_perfmon.Put(GSPerfMon::TextureCopies, 1);
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g_perfmon.Put(GSPerfMon::TextureCopies, 1);
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}
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}
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else if(m_temp_z_full_copy)
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else if (m_temp_z_full_copy)
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{
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{
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GSVector4i dRect = GSVector4i((ds->m_valid.x + z_horizontal_offset) * ds->m_scale, (ds->m_valid.y + z_vertical_offset) * ds->m_scale, (ds->m_valid.z + z_horizontal_offset + (1.0f / ds->m_scale)) * ds->m_scale, (ds->m_valid.w + z_vertical_offset + (1.0f / ds->m_scale)) * ds->m_scale);
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GSVector4i dRect = GSVector4i((ds->m_valid.x + z_horizontal_offset) * ds->m_scale, (ds->m_valid.y + z_vertical_offset) * ds->m_scale, (ds->m_valid.z + z_horizontal_offset + (1.0f / ds->m_scale)) * ds->m_scale, (ds->m_valid.w + z_vertical_offset + (1.0f / ds->m_scale)) * ds->m_scale);
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GSVector4 sRect = GSVector4(((ds->m_valid.x + horizontal_offset) * ds->m_scale) / static_cast<float>(g_texture_cache->GetTemporaryZ()->GetWidth()), static_cast<float>((ds->m_valid.y + vertical_offset) * ds->m_scale) / static_cast<float>(g_texture_cache->GetTemporaryZ()->GetHeight()), (((ds->m_valid.z + horizontal_offset) + (1.0f / ds->m_scale)) * ds->m_scale) / static_cast<float>(g_texture_cache->GetTemporaryZ()->GetWidth()),
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GSVector4 sRect = GSVector4(((ds->m_valid.x + horizontal_offset) * ds->m_scale) / static_cast<float>(g_texture_cache->GetTemporaryZ()->GetWidth()), static_cast<float>((ds->m_valid.y + vertical_offset) * ds->m_scale) / static_cast<float>(g_texture_cache->GetTemporaryZ()->GetHeight()), (((ds->m_valid.z + horizontal_offset) + (1.0f / ds->m_scale)) * ds->m_scale) / static_cast<float>(g_texture_cache->GetTemporaryZ()->GetWidth()),
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@ -2277,7 +2277,7 @@ GSTextureCache::Target* GSTextureCache::LookupTarget(GIFRegTEX0 TEX0, const GSVe
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dst->m_32_bits_fmt |= (psm_s.bpp != 16);
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dst->m_32_bits_fmt |= (psm_s.bpp != 16);
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break;
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break;
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}
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}
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else if(!(src && src->m_from_target == t))
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else if (!(src && src->m_from_target == t))
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{
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{
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GL_INS("TC: Deleting RT BP 0x%x BW %d PSM %s due to change in target", t->m_TEX0.TBP0, t->m_TEX0.TBW, psm_str(t->m_TEX0.PSM));
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GL_INS("TC: Deleting RT BP 0x%x BW %d PSM %s due to change in target", t->m_TEX0.TBP0, t->m_TEX0.TBW, psm_str(t->m_TEX0.PSM));
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InvalidateSourcesFromTarget(t);
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InvalidateSourcesFromTarget(t);
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@ -2600,7 +2600,7 @@ GSTextureCache::Target* GSTextureCache::LookupTarget(GIFRegTEX0 TEX0, const GSVe
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src->m_target_direct = false;
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src->m_target_direct = false;
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src->m_shared_texture = false;
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src->m_shared_texture = false;
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if(!req_copy)
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if (!req_copy)
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dst->ResizeTexture(new_size.x, new_size.y, true, true, GSVector4i(dRect), true);
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dst->ResizeTexture(new_size.x, new_size.y, true, true, GSVector4i(dRect), true);
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else
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else
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{
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{
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@ -2650,7 +2650,7 @@ GSTextureCache::Target* GSTextureCache::LookupTarget(GIFRegTEX0 TEX0, const GSVe
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if ((!is_shuffle && (GSLocalMemory::m_psm[dst->m_TEX0.PSM].bpp != GSLocalMemory::m_psm[TEX0.PSM].bpp || GSLocalMemory::m_psm[dst->m_TEX0.PSM].depth != GSLocalMemory::m_psm[TEX0.PSM].depth)) ||
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if ((!is_shuffle && (GSLocalMemory::m_psm[dst->m_TEX0.PSM].bpp != GSLocalMemory::m_psm[TEX0.PSM].bpp || GSLocalMemory::m_psm[dst->m_TEX0.PSM].depth != GSLocalMemory::m_psm[TEX0.PSM].depth)) ||
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(is_shuffle && GSLocalMemory::m_psm[dst->m_TEX0.PSM].bpp == 16))
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(is_shuffle && GSLocalMemory::m_psm[dst->m_TEX0.PSM].bpp == 16))
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{
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{
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if(GSLocalMemory::m_psm[dst->m_TEX0.PSM].depth != GSLocalMemory::m_psm[TEX0.PSM].depth || dst->m_TEX0.TBW != TEX0.TBW)
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if (GSLocalMemory::m_psm[dst->m_TEX0.PSM].depth != GSLocalMemory::m_psm[TEX0.PSM].depth || dst->m_TEX0.TBW != TEX0.TBW)
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dst->m_32_bits_fmt = GSLocalMemory::m_psm[TEX0.PSM].bpp != 16;
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dst->m_32_bits_fmt = GSLocalMemory::m_psm[TEX0.PSM].bpp != 16;
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if (!is_shuffle || (is_shuffle && GSLocalMemory::m_psm[dst->m_TEX0.PSM].bpp == 16))
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if (!is_shuffle || (is_shuffle && GSLocalMemory::m_psm[dst->m_TEX0.PSM].bpp == 16))
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@ -5441,7 +5441,7 @@ GSTextureCache::Source* GSTextureCache::CreateSource(const GIFRegTEX0& TEX0, con
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src->m_unscaled_size = dst->m_unscaled_size;
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src->m_unscaled_size = dst->m_unscaled_size;
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src->m_shared_texture = true;
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src->m_shared_texture = true;
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if(channel_shuffle)
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if (channel_shuffle)
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m_temporary_source = src;
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m_temporary_source = src;
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}
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}
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@ -5791,7 +5791,7 @@ GSTextureCache::Source* GSTextureCache::CreateSource(const GIFRegTEX0& TEX0, con
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src->m_region.SetX(x_offset, x_offset + tw);
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src->m_region.SetX(x_offset, x_offset + tw);
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src->m_region.SetY(y_offset, y_offset + th);
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src->m_region.SetY(y_offset, y_offset + th);
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if(!GSConfig.UserHacks_NativePaletteDraw)
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if (!GSConfig.UserHacks_NativePaletteDraw)
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m_temporary_source = src;
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m_temporary_source = src;
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}
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}
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else
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else
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@ -6781,7 +6781,7 @@ GSTextureCache::Source::~Source()
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// to recycle.
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// to recycle.
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if (!m_shared_texture && !m_from_hash_cache && m_texture)
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if (!m_shared_texture && !m_from_hash_cache && m_texture)
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{
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{
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if(m_from_target)
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if (m_from_target)
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g_texture_cache->m_target_memory_usage -= m_texture->GetMemUsage();
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g_texture_cache->m_target_memory_usage -= m_texture->GetMemUsage();
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else
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else
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g_texture_cache->m_source_memory_usage -= m_texture->GetMemUsage();
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g_texture_cache->m_source_memory_usage -= m_texture->GetMemUsage();
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@ -1491,7 +1491,7 @@ __ri void GSDrawScanline::CDrawScanline(int pixels, int left, int top, const GSV
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case 2: break;
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case 2: break;
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}
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}
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if(!(sel.fpsm == 1 && sel.abc == 1))
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if (!(sel.fpsm == 1 && sel.abc == 1))
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{
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{
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switch(sel.abc)
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switch(sel.abc)
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{
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{
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@ -562,7 +562,7 @@ L("loop");
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L("step");
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L("step");
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// if(steps <= 0) break;
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// if (steps <= 0) break;
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if (!m_sel.edge)
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if (!m_sel.edge)
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{
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{
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@ -768,7 +768,7 @@ void GSDrawScanlineCodeGenerator::Init()
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cvttps2dq(xym6, vt);
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cvttps2dq(xym6, vt);
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// s = vti.xxxx() + m_local.d[skip].s;
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// s = vti.xxxx() + m_local.d[skip].s;
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// t = vti.yyyy(); if(!sprite) t += m_local.d[skip].t;
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// t = vti.yyyy(); if (!sprite) t += m_local.d[skip].t;
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pshufd(s, xym6, _MM_SHUFFLE(0, 0, 0, 0));
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pshufd(s, xym6, _MM_SHUFFLE(0, 0, 0, 0));
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pshufd(t, xym6, _MM_SHUFFLE(1, 1, 1, 1));
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pshufd(t, xym6, _MM_SHUFFLE(1, 1, 1, 1));
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@ -925,7 +925,7 @@ void GSDrawScanlineCodeGenerator::Step()
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// GSVector4i stq = m_local.d4.stq;
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// GSVector4i stq = m_local.d4.stq;
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// s += stq.xxxx();
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// s += stq.xxxx();
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// if(!sprite) t += st.yyyy();
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// if (!sprite) t += st.yyyy();
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broadcasti128(stq, _rip_local_d(stq));
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broadcasti128(stq, _rip_local_d(stq));
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@ -2096,7 +2096,7 @@ void GSDrawScanlineCodeGenerator::AlphaTFX()
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clamp16(_ga, tmp);
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clamp16(_ga, tmp);
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// if(!tcc) gat = gat.mix16(ga.srl16(7));
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// if (!tcc) gat = gat.mix16(ga.srl16(7));
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if (!m_sel.tcc)
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if (!m_sel.tcc)
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{
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{
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@ -2109,7 +2109,7 @@ void GSDrawScanlineCodeGenerator::AlphaTFX()
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case TFX_DECAL:
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case TFX_DECAL:
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// if(!tcc) gat = gat.mix16(ga.srl16(7));
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// if (!tcc) gat = gat.mix16(ga.srl16(7));
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if (!m_sel.tcc)
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if (!m_sel.tcc)
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{
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{
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// GSVector4i ga = iip ? gaf : m_local.c.ga;
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// GSVector4i ga = iip ? gaf : m_local.c.ga;
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@ -2139,7 +2139,7 @@ void GSDrawScanlineCodeGenerator::AlphaTFX()
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case TFX_HIGHLIGHT2:
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case TFX_HIGHLIGHT2:
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// if(!tcc) gat = gat.mix16(ga.srl16(7));
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// if (!tcc) gat = gat.mix16(ga.srl16(7));
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if (!m_sel.tcc)
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if (!m_sel.tcc)
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{
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{
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@ -2990,8 +2990,8 @@ void GSDrawScanlineCodeGenerator::WritePixel(const XYm& src_, const AddressReg&
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{
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{
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if (fast)
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if (fast)
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{
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{
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// if(fzm & 0x0f) GSVector4i::storel(&vm16[addr + 0], fs);
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// if (fzm & 0x0f) GSVector4i::storel(&vm16[addr + 0], fs);
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// if(fzm & 0xf0) GSVector4i::storeh(&vm16[addr + 8], fs);
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// if (fzm & 0xf0) GSVector4i::storeh(&vm16[addr + 8], fs);
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test(mask, 0x0000000f << shift);
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test(mask, 0x0000000f << shift);
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je("@f");
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je("@f");
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@ -3020,10 +3020,10 @@ void GSDrawScanlineCodeGenerator::WritePixel(const XYm& src_, const AddressReg&
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}
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}
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else
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else
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{
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{
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// if(fzm & 0x03) WritePixel(fpsm, &vm16[addr + 0], fs.extract32<0>());
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// if (fzm & 0x03) WritePixel(fpsm, &vm16[addr + 0], fs.extract32<0>());
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// if(fzm & 0x0c) WritePixel(fpsm, &vm16[addr + 2], fs.extract32<1>());
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// if (fzm & 0x0c) WritePixel(fpsm, &vm16[addr + 2], fs.extract32<1>());
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// if(fzm & 0x30) WritePixel(fpsm, &vm16[addr + 8], fs.extract32<2>());
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// if (fzm & 0x30) WritePixel(fpsm, &vm16[addr + 8], fs.extract32<2>());
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// if(fzm & 0xc0) WritePixel(fpsm, &vm16[addr + 10], fs.extract32<3>());
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// if (fzm & 0xc0) WritePixel(fpsm, &vm16[addr + 10], fs.extract32<3>());
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test(mask, 0x00000003 << shift);
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test(mask, 0x00000003 << shift);
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je("@f");
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je("@f");
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@ -158,7 +158,7 @@ void GSDrawScanlineCodeGenerator::Generate()
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Label exit;
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Label exit;
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armAsm->Bind(&m_step_label);
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armAsm->Bind(&m_step_label);
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// if(steps <= 0) break;
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// if (steps <= 0) break;
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if (!m_sel.edge)
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if (!m_sel.edge)
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{
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{
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@ -332,7 +332,7 @@ void GSDrawScanlineCodeGenerator::Init()
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armAsm->Fcvtzs(v6.V4S(), v4.V4S());
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armAsm->Fcvtzs(v6.V4S(), v4.V4S());
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// s = vti.xxxx() + m_local.d[skip].s;
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// s = vti.xxxx() + m_local.d[skip].s;
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// t = vti.yyyy(); if(!sprite) t += m_local.d[skip].t;
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// t = vti.yyyy(); if (!sprite) t += m_local.d[skip].t;
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armAsm->Dup(_temp_s.V4S(), v6.V4S(), 0);
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armAsm->Dup(_temp_s.V4S(), v6.V4S(), 0);
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armAsm->Dup(_temp_t.V4S(), v6.V4S(), 1);
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armAsm->Dup(_temp_t.V4S(), v6.V4S(), 1);
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@ -485,7 +485,7 @@ void GSDrawScanlineCodeGenerator::Step()
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// GSVector4i stq = m_local.d4.stq;
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// GSVector4i stq = m_local.d4.stq;
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// s += stq.xxxx();
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// s += stq.xxxx();
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// if(!sprite) t += stq.yyyy();
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// if (!sprite) t += stq.yyyy();
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armAsm->Dup(_vscratch.V4S(), _d4_stq.V4S(), 0);
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armAsm->Dup(_vscratch.V4S(), _d4_stq.V4S(), 0);
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if (m_sel.prim != GS_SPRITE_CLASS || m_sel.mmin)
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if (m_sel.prim != GS_SPRITE_CLASS || m_sel.mmin)
|
||||||
@ -1394,7 +1394,7 @@ void GSDrawScanlineCodeGenerator::AlphaTFX()
|
|||||||
modulate16(v6, _temp_ga, 1);
|
modulate16(v6, _temp_ga, 1);
|
||||||
clamp16(v6, v3);
|
clamp16(v6, v3);
|
||||||
|
|
||||||
// if(!tcc) gat = gat.mix16(ga.srl16(7));
|
// if (!tcc) gat = gat.mix16(ga.srl16(7));
|
||||||
|
|
||||||
if (!m_sel.tcc)
|
if (!m_sel.tcc)
|
||||||
{
|
{
|
||||||
@ -1407,7 +1407,7 @@ void GSDrawScanlineCodeGenerator::AlphaTFX()
|
|||||||
|
|
||||||
case TFX_DECAL:
|
case TFX_DECAL:
|
||||||
|
|
||||||
// if(!tcc) gat = gat.mix16(ga.srl16(7));
|
// if (!tcc) gat = gat.mix16(ga.srl16(7));
|
||||||
|
|
||||||
if (!m_sel.tcc)
|
if (!m_sel.tcc)
|
||||||
{
|
{
|
||||||
@ -1435,7 +1435,7 @@ void GSDrawScanlineCodeGenerator::AlphaTFX()
|
|||||||
|
|
||||||
case TFX_HIGHLIGHT2:
|
case TFX_HIGHLIGHT2:
|
||||||
|
|
||||||
// if(!tcc) gat = gat.mix16(ga.srl16(7));
|
// if (!tcc) gat = gat.mix16(ga.srl16(7));
|
||||||
|
|
||||||
if (!m_sel.tcc)
|
if (!m_sel.tcc)
|
||||||
{
|
{
|
||||||
@ -2158,8 +2158,8 @@ void GSDrawScanlineCodeGenerator::WritePixel(const VRegister& src, const Registe
|
|||||||
{
|
{
|
||||||
if (fast)
|
if (fast)
|
||||||
{
|
{
|
||||||
// if(fzm & 0x0f) GSVector4i::storel(&vm16[addr + 0], fs);
|
// if (fzm & 0x0f) GSVector4i::storel(&vm16[addr + 0], fs);
|
||||||
// if(fzm & 0xf0) GSVector4i::storeh(&vm16[addr + 8], fs);
|
// if (fzm & 0xf0) GSVector4i::storeh(&vm16[addr + 8], fs);
|
||||||
|
|
||||||
Label skip_low, skip_high;
|
Label skip_low, skip_high;
|
||||||
armAsm->Lsl(_wscratch, addr, 1); // *2
|
armAsm->Lsl(_wscratch, addr, 1); // *2
|
||||||
@ -2177,10 +2177,10 @@ void GSDrawScanlineCodeGenerator::WritePixel(const VRegister& src, const Registe
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// if(fzm & 0x03) WritePixel(fpsm, &vm16[addr + 0], fs.extract32<0>());
|
// if (fzm & 0x03) WritePixel(fpsm, &vm16[addr + 0], fs.extract32<0>());
|
||||||
// if(fzm & 0x0c) WritePixel(fpsm, &vm16[addr + 2], fs.extract32<1>());
|
// if (fzm & 0x0c) WritePixel(fpsm, &vm16[addr + 2], fs.extract32<1>());
|
||||||
// if(fzm & 0x30) WritePixel(fpsm, &vm16[addr + 8], fs.extract32<2>());
|
// if (fzm & 0x30) WritePixel(fpsm, &vm16[addr + 8], fs.extract32<2>());
|
||||||
// if(fzm & 0xc0) WritePixel(fpsm, &vm16[addr + 10], fs.extract32<3>());
|
// if (fzm & 0xc0) WritePixel(fpsm, &vm16[addr + 10], fs.extract32<3>());
|
||||||
|
|
||||||
Label skip_0, skip_1, skip_2, skip_3;
|
Label skip_0, skip_1, skip_2, skip_3;
|
||||||
|
|
||||||
|
|||||||
@ -444,9 +444,9 @@ void GSRasterizer::DrawTriangle(const GSVertexSW* vertex, const u16* index)
|
|||||||
|
|
||||||
m1 = (y0011 == y1221).mask() & 7;
|
m1 = (y0011 == y1221).mask() & 7;
|
||||||
|
|
||||||
// if(i == 0) => y0 < y1 < y2
|
// if (i == 0) => y0 < y1 < y2
|
||||||
// if(i == 1) => y0 == y1 < y2
|
// if (i == 1) => y0 == y1 < y2
|
||||||
// if(i == 4) => y0 < y1 == y2
|
// if (i == 4) => y0 < y1 == y2
|
||||||
|
|
||||||
if (m1 == 7) // y0 == y1 == y2
|
if (m1 == 7) // y0 == y1 == y2
|
||||||
return;
|
return;
|
||||||
@ -623,9 +623,9 @@ void GSRasterizer::DrawTriangle(const GSVertexSW* vertex, const u16* index)
|
|||||||
|
|
||||||
m1 = (y0011 == y1221).mask() & 7;
|
m1 = (y0011 == y1221).mask() & 7;
|
||||||
|
|
||||||
// if(i == 0) => y0 < y1 < y2
|
// if (i == 0) => y0 < y1 < y2
|
||||||
// if(i == 1) => y0 == y1 < y2
|
// if (i == 1) => y0 == y1 < y2
|
||||||
// if(i == 4) => y0 < y1 == y2
|
// if (i == 4) => y0 < y1 == y2
|
||||||
|
|
||||||
if (m1 == 7)
|
if (m1 == 7)
|
||||||
return; // y0 == y1 == y2
|
return; // y0 == y1 == y2
|
||||||
|
|||||||
@ -94,7 +94,7 @@ void GSRendererSW::VSync(u32 field, bool registers_written, bool idle_frame)
|
|||||||
m_tc->IncAge();
|
m_tc->IncAge();
|
||||||
|
|
||||||
m_draw_transfers.clear();
|
m_draw_transfers.clear();
|
||||||
// if((m_perfmon.GetFrame() & 255) == 0) m_rl->PrintStats();
|
// if ((m_perfmon.GetFrame() & 255) == 0) m_rl->PrintStats();
|
||||||
}
|
}
|
||||||
|
|
||||||
GSTexture* GSRendererSW::GetOutput(int i, float& scale, int& y_offset)
|
GSTexture* GSRendererSW::GetOutput(int i, float& scale, int& y_offset)
|
||||||
|
|||||||
@ -515,7 +515,7 @@ void GSSetupPrimCodeGenerator::Color()
|
|||||||
pshufd(xym1, xym0, _MM_SHUFFLE(1, 0, 3, 2));
|
pshufd(xym1, xym0, _MM_SHUFFLE(1, 0, 3, 2));
|
||||||
punpcklwd(xym0, xym1);
|
punpcklwd(xym0, xym1);
|
||||||
|
|
||||||
// if(!tme) c = c.srl16(7);
|
// if (!tme) c = c.srl16(7);
|
||||||
|
|
||||||
if (m_sel.tfx == TFX_NONE)
|
if (m_sel.tfx == TFX_NONE)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -322,7 +322,7 @@ void GSSetupPrimCodeGenerator::Color()
|
|||||||
armAsm->Ext(v1.V16B(), v0.V16B(), v0.V16B(), 8);
|
armAsm->Ext(v1.V16B(), v0.V16B(), v0.V16B(), 8);
|
||||||
armAsm->Zip1(v0.V8H(), v0.V8H(), v1.V8H());
|
armAsm->Zip1(v0.V8H(), v0.V8H(), v1.V8H());
|
||||||
|
|
||||||
// if(!tme) c = c.srl16(7);
|
// if (!tme) c = c.srl16(7);
|
||||||
|
|
||||||
if (m_sel.tfx == TFX_NONE)
|
if (m_sel.tfx == TFX_NONE)
|
||||||
armAsm->Ushr(v0.V8H(), v0.V8H(), 7);
|
armAsm->Ushr(v0.V8H(), v0.V8H(), 7);
|
||||||
|
|||||||
@ -10,9 +10,9 @@
|
|||||||
#define ipumsk( src ) ( (src) & 0xff )
|
#define ipumsk( src ) ( (src) & 0xff )
|
||||||
#define ipucase( src ) case ipumsk(src)
|
#define ipucase( src ) case ipumsk(src)
|
||||||
|
|
||||||
#define IPU_INT_TO( cycles ) if(!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles )
|
#define IPU_INT_TO( cycles ) if (!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles )
|
||||||
#define IPU_INT_FROM( cycles ) CPU_INT( DMAC_FROM_IPU, cycles )
|
#define IPU_INT_FROM( cycles ) CPU_INT( DMAC_FROM_IPU, cycles )
|
||||||
#define IPU_INT_PROCESS( cycles ) if(!(cpuRegs.interrupt & (1 << IPU_PROCESS))) CPU_INT( IPU_PROCESS, cycles )
|
#define IPU_INT_PROCESS( cycles ) if (!(cpuRegs.interrupt & (1 << IPU_PROCESS))) CPU_INT( IPU_PROCESS, cycles )
|
||||||
//
|
//
|
||||||
// Bitfield Structures
|
// Bitfield Structures
|
||||||
//
|
//
|
||||||
|
|||||||
@ -190,7 +190,7 @@ static void execI()
|
|||||||
#if 0
|
#if 0
|
||||||
static long int print_me = 0;
|
static long int print_me = 0;
|
||||||
// Based on cycle
|
// Based on cycle
|
||||||
// if( cpuRegs.cycle > 0x4f24d714 )
|
// if ( cpuRegs.cycle > 0x4f24d714 )
|
||||||
// Or dump from a particular PC (useful to debug handler/syscall)
|
// Or dump from a particular PC (useful to debug handler/syscall)
|
||||||
if (pc == 0x80000000)
|
if (pc == 0x80000000)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -20,7 +20,7 @@
|
|||||||
#define G_GC(reg)
|
#define G_GC(reg)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define SUM_FLAG if(gteFLAG & 0x7F87E000) gteFLAG |= 0x80000000;
|
#define SUM_FLAG if (gteFLAG & 0x7F87E000) gteFLAG |= 0x80000000;
|
||||||
|
|
||||||
#ifdef _MSC_VER_
|
#ifdef _MSC_VER_
|
||||||
#pragma warning(disable:4244)
|
#pragma warning(disable:4244)
|
||||||
|
|||||||
@ -356,7 +356,7 @@ void ba0W16(u32 mem, u16 value)
|
|||||||
s_ba_command_executing = true;
|
s_ba_command_executing = true;
|
||||||
s_ba_error_detected = false;
|
s_ba_error_detected = false;
|
||||||
}
|
}
|
||||||
else if(s_ba[0x2] == 0x42) // Read Mode
|
else if (s_ba[0x2] == 0x42) // Read Mode
|
||||||
{
|
{
|
||||||
int size = (s_ba[masked_mem] & 0xF);
|
int size = (s_ba[masked_mem] & 0xF);
|
||||||
|
|
||||||
@ -406,7 +406,7 @@ u16 ba0R16(u32 mem)
|
|||||||
|
|
||||||
void MyMemCheck(u32 mem)
|
void MyMemCheck(u32 mem)
|
||||||
{
|
{
|
||||||
if( mem == 0x1c02f2a0 )
|
if ( mem == 0x1c02f2a0 )
|
||||||
Console.WriteLn("yo; (mem == 0x1c02f2a0) in MyMemCheck...");
|
Console.WriteLn("yo; (mem == 0x1c02f2a0) in MyMemCheck...");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -256,7 +256,7 @@ void iopTestIntc()
|
|||||||
// Note: No need to set the iop's branch delta here, since the EE
|
// Note: No need to set the iop's branch delta here, since the EE
|
||||||
// will run an IOP branch test regardless.
|
// will run an IOP branch test regardless.
|
||||||
}
|
}
|
||||||
else if( !iopEventTestIsActive )
|
else if ( !iopEventTestIsActive )
|
||||||
psxSetNextBranchDelta( 2 );
|
psxSetNextBranchDelta( 2 );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -127,9 +127,9 @@ __ri void cpuException(u32 code, u32 bd)
|
|||||||
cpuUpdateOperationMode();
|
cpuUpdateOperationMode();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
else if((code & 0x38000) == 0x10000)
|
else if ((code & 0x38000) == 0x10000)
|
||||||
offset = 0x80; //Performance Counter
|
offset = 0x80; //Performance Counter
|
||||||
else if((code & 0x38000) == 0x18000)
|
else if ((code & 0x38000) == 0x18000)
|
||||||
offset = 0x100; //Debug
|
offset = 0x100; //Debug
|
||||||
else
|
else
|
||||||
Console.Error("Unknown Level 2 Exception!! Cause %x", code);
|
Console.Error("Unknown Level 2 Exception!! Cause %x", code);
|
||||||
|
|||||||
@ -1117,7 +1117,7 @@ static void RegWrite_Core(u16 value)
|
|||||||
|
|
||||||
if (!thiscore.DmaMode && !(thiscore.Regs.STATX & 0x400))
|
if (!thiscore.DmaMode && !(thiscore.Regs.STATX & 0x400))
|
||||||
thiscore.Regs.STATX &= ~0x80;
|
thiscore.Regs.STATX &= ~0x80;
|
||||||
else if(!oldDmaMode && thiscore.DmaMode)
|
else if (!oldDmaMode && thiscore.DmaMode)
|
||||||
thiscore.Regs.STATX |= 0x80;
|
thiscore.Regs.STATX |= 0x80;
|
||||||
|
|
||||||
thiscore.ActiveTSA = thiscore.TSA;
|
thiscore.ActiveTSA = thiscore.TSA;
|
||||||
|
|||||||
@ -164,7 +164,7 @@ static int jo_processDU(jo_bits_t *bits, float A[64], const unsigned char htdc[9
|
|||||||
jo_writeBits(bits, run, 6);
|
jo_writeBits(bits, run, 6);
|
||||||
if (AC < -127) {
|
if (AC < -127) {
|
||||||
jo_writeBits(bits, 128, 12);
|
jo_writeBits(bits, 128, 12);
|
||||||
} else if(AC > 127) {
|
} else if (AC > 127) {
|
||||||
jo_writeBits(bits, 0, 12);
|
jo_writeBits(bits, 0, 12);
|
||||||
}
|
}
|
||||||
code = AC & 0xFFF;
|
code = AC & 0xFFF;
|
||||||
|
|||||||
@ -93,7 +93,7 @@ _vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) {
|
|||||||
|
|
||||||
if(!vifXch.qwc)
|
if(!vifXch.qwc)
|
||||||
vifX.inprogress &= ~0x1;
|
vifX.inprogress &= ~0x1;
|
||||||
else if(vifX.irqoffset.value != 0)
|
else if (vifX.irqoffset.value != 0)
|
||||||
vifX.irqoffset.enabled = true;
|
vifX.irqoffset.enabled = true;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|||||||
@ -70,12 +70,12 @@ mem8_t iopHwRead8_Page1( u32 addr )
|
|||||||
DevCon.Warning( "HwRead8 from Counter16 [ignored] @ 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
DevCon.Warning( "HwRead8 from Counter16 [ignored] @ 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
||||||
ret = psxHu8( addr );
|
ret = psxHu8( addr );
|
||||||
}
|
}
|
||||||
else if( masked_addr >= 0x480 && masked_addr < 0x4a0 )
|
else if ( masked_addr >= 0x480 && masked_addr < 0x4a0 )
|
||||||
{
|
{
|
||||||
DevCon.Warning( "HwRead8 from Counter32 [ignored] @ 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
DevCon.Warning( "HwRead8 from Counter32 [ignored] @ 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
||||||
ret = psxHu8( addr );
|
ret = psxHu8( addr );
|
||||||
}
|
}
|
||||||
else if( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
else if ( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
||||||
{
|
{
|
||||||
ret = USBread8( addr );
|
ret = USBread8( addr );
|
||||||
PSXHW_LOG( "HwRead8 from USB @ 0x%08x = 0x%02x", addr, ret );
|
PSXHW_LOG( "HwRead8 from USB @ 0x%08x = 0x%02x", addr, ret );
|
||||||
@ -179,7 +179,7 @@ static __fi T _HwRead_16or32_Page1( u32 addr )
|
|||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// Counters, 32-bit varieties!
|
// Counters, 32-bit varieties!
|
||||||
//
|
//
|
||||||
else if( masked_addr >= 0x480 && masked_addr < 0x4b0 )
|
else if ( masked_addr >= 0x480 && masked_addr < 0x4b0 )
|
||||||
{
|
{
|
||||||
int cntidx = (( masked_addr >> 4 ) & 0xf) - 5;
|
int cntidx = (( masked_addr >> 4 ) & 0xf) - 5;
|
||||||
switch( masked_addr & 0xf )
|
switch( masked_addr & 0xf )
|
||||||
@ -218,14 +218,14 @@ static __fi T _HwRead_16or32_Page1( u32 addr )
|
|||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// USB, with both 16 and 32 bit interfaces
|
// USB, with both 16 and 32 bit interfaces
|
||||||
//
|
//
|
||||||
else if( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
else if ( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
||||||
{
|
{
|
||||||
ret = (sizeof(T) == 2) ? USBread16( addr ) : USBread32( addr );
|
ret = (sizeof(T) == 2) ? USBread16( addr ) : USBread32( addr );
|
||||||
}
|
}
|
||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// SPU2, accessible in 16 bit mode only!
|
// SPU2, accessible in 16 bit mode only!
|
||||||
//
|
//
|
||||||
else if( masked_addr >= pgmsk(HW_SPU2_START) && masked_addr < pgmsk(HW_SPU2_END) )
|
else if ( masked_addr >= pgmsk(HW_SPU2_START) && masked_addr < pgmsk(HW_SPU2_END) )
|
||||||
{
|
{
|
||||||
if( sizeof(T) == 2 )
|
if( sizeof(T) == 2 )
|
||||||
ret = SPU2read( addr );
|
ret = SPU2read( addr );
|
||||||
@ -238,7 +238,7 @@ static __fi T _HwRead_16or32_Page1( u32 addr )
|
|||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// PS1 GPU access
|
// PS1 GPU access
|
||||||
//
|
//
|
||||||
else if( (masked_addr >= pgmsk(HW_PS1_GPU_START)) && (masked_addr < pgmsk(HW_PS1_GPU_END)) )
|
else if ( (masked_addr >= pgmsk(HW_PS1_GPU_START)) && (masked_addr < pgmsk(HW_PS1_GPU_END)) )
|
||||||
{
|
{
|
||||||
// todo: psx mode: this is new
|
// todo: psx mode: this is new
|
||||||
if( sizeof(T) == 2 )
|
if( sizeof(T) == 2 )
|
||||||
@ -418,7 +418,7 @@ mem32_t iopHwRead32_Page8( u32 addr )
|
|||||||
ret = g_Sio2.send3[parm];
|
ret = g_Sio2.send3[parm];
|
||||||
Sio2Log.WriteLn("%s(%08X) SIO2 SEND3 Read (%08X)", __FUNCTION__, addr, ret);
|
Sio2Log.WriteLn("%s(%08X) SIO2 SEND3 Read (%08X)", __FUNCTION__, addr, ret);
|
||||||
}
|
}
|
||||||
else if( masked_addr < 0x260 )
|
else if ( masked_addr < 0x260 )
|
||||||
{
|
{
|
||||||
// SIO2 Send commands alternate registers. First reg maps to Send1, second
|
// SIO2 Send commands alternate registers. First reg maps to Send1, second
|
||||||
// to Send2, third to Send1, etc. And the following clever code does this:
|
// to Send2, third to Send1, etc. And the following clever code does this:
|
||||||
@ -426,7 +426,7 @@ mem32_t iopHwRead32_Page8( u32 addr )
|
|||||||
ret = (masked_addr & 4) ? g_Sio2.send2[parm] : g_Sio2.send1[parm];
|
ret = (masked_addr & 4) ? g_Sio2.send2[parm] : g_Sio2.send1[parm];
|
||||||
Sio2Log.WriteLn("%s(%08X) SIO2 SEND1/2 Read (%08X)", __FUNCTION__, addr, ret);
|
Sio2Log.WriteLn("%s(%08X) SIO2 SEND1/2 Read (%08X)", __FUNCTION__, addr, ret);
|
||||||
}
|
}
|
||||||
else if( masked_addr <= 0x280 )
|
else if ( masked_addr <= 0x280 )
|
||||||
{
|
{
|
||||||
switch( masked_addr )
|
switch( masked_addr )
|
||||||
{
|
{
|
||||||
@ -471,7 +471,7 @@ mem32_t iopHwRead32_Page8( u32 addr )
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if( masked_addr >= pgmsk(HW_FW_START) && masked_addr <= pgmsk(HW_FW_END) )
|
else if ( masked_addr >= pgmsk(HW_FW_START) && masked_addr <= pgmsk(HW_FW_END) )
|
||||||
{
|
{
|
||||||
ret = FWread32( addr );
|
ret = FWread32( addr );
|
||||||
} else {
|
} else {
|
||||||
|
|||||||
@ -104,12 +104,12 @@ void iopHwWrite8_Page1( u32 addr, mem8_t val )
|
|||||||
DbgCon.Warning( "HwWrite8 to Counter16 [ignored] @ addr 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
DbgCon.Warning( "HwWrite8 to Counter16 [ignored] @ addr 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
||||||
psxHu8( addr ) = val;
|
psxHu8( addr ) = val;
|
||||||
}
|
}
|
||||||
else if( masked_addr >= 0x480 && masked_addr < 0x4a0 )
|
else if ( masked_addr >= 0x480 && masked_addr < 0x4a0 )
|
||||||
{
|
{
|
||||||
DbgCon.Warning( "HwWrite8 to Counter32 [ignored] @ addr 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
DbgCon.Warning( "HwWrite8 to Counter32 [ignored] @ addr 0x%08x = 0x%02x", addr, psxHu8(addr) );
|
||||||
psxHu8( addr ) = val;
|
psxHu8( addr ) = val;
|
||||||
}
|
}
|
||||||
else if( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
else if ( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
||||||
{
|
{
|
||||||
USBwrite8( addr, val );
|
USBwrite8( addr, val );
|
||||||
}
|
}
|
||||||
@ -219,7 +219,7 @@ static __fi void _HwWrite_16or32_Page1( u32 addr, T val )
|
|||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// Counters, 32-bit varieties!
|
// Counters, 32-bit varieties!
|
||||||
//
|
//
|
||||||
else if( masked_addr >= 0x480 && masked_addr < 0x4b0 )
|
else if ( masked_addr >= 0x480 && masked_addr < 0x4b0 )
|
||||||
{
|
{
|
||||||
int cntidx = (( masked_addr >> 4 ) & 0xf) - 5;
|
int cntidx = (( masked_addr >> 4 ) & 0xf) - 5;
|
||||||
switch( masked_addr & 0xf )
|
switch( masked_addr & 0xf )
|
||||||
@ -252,14 +252,14 @@ static __fi void _HwWrite_16or32_Page1( u32 addr, T val )
|
|||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// USB, with both 16 and 32 bit interfaces
|
// USB, with both 16 and 32 bit interfaces
|
||||||
//
|
//
|
||||||
else if( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
else if ( (masked_addr >= pgmsk(HW_USB_START)) && (masked_addr < pgmsk(HW_USB_END)) )
|
||||||
{
|
{
|
||||||
if( sizeof(T) == 2 ) USBwrite16( addr, val ); else USBwrite32( addr, val );
|
if( sizeof(T) == 2 ) USBwrite16( addr, val ); else USBwrite32( addr, val );
|
||||||
}
|
}
|
||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// SPU2, accessible in 16 bit mode only!
|
// SPU2, accessible in 16 bit mode only!
|
||||||
//
|
//
|
||||||
else if( (masked_addr >= pgmsk(HW_SPU2_START)) && (masked_addr < pgmsk(HW_SPU2_END)) )
|
else if ( (masked_addr >= pgmsk(HW_SPU2_START)) && (masked_addr < pgmsk(HW_SPU2_END)) )
|
||||||
{
|
{
|
||||||
if( sizeof(T) == 2 )
|
if( sizeof(T) == 2 )
|
||||||
SPU2write( addr, val );
|
SPU2write( addr, val );
|
||||||
@ -272,7 +272,7 @@ static __fi void _HwWrite_16or32_Page1( u32 addr, T val )
|
|||||||
// ------------------------------------------------------------------------
|
// ------------------------------------------------------------------------
|
||||||
// PS1 GPU access
|
// PS1 GPU access
|
||||||
//
|
//
|
||||||
else if( (masked_addr >= pgmsk(HW_PS1_GPU_START)) && (masked_addr < pgmsk(HW_PS1_GPU_END)) )
|
else if ( (masked_addr >= pgmsk(HW_PS1_GPU_START)) && (masked_addr < pgmsk(HW_PS1_GPU_END)) )
|
||||||
{
|
{
|
||||||
// todo: psx mode: this is new
|
// todo: psx mode: this is new
|
||||||
if( sizeof(T) == 2 )
|
if( sizeof(T) == 2 )
|
||||||
@ -599,7 +599,7 @@ void iopHwWrite32_Page8( u32 addr, mem32_t val )
|
|||||||
const int parm = (masked_addr - 0x200) / 4;
|
const int parm = (masked_addr - 0x200) / 4;
|
||||||
g_Sio2.SetSend3(parm, val);
|
g_Sio2.SetSend3(parm, val);
|
||||||
}
|
}
|
||||||
else if( masked_addr < 0x260 )
|
else if ( masked_addr < 0x260 )
|
||||||
{
|
{
|
||||||
// SIO2 Send commands alternate registers. First reg maps to Send1, second
|
// SIO2 Send commands alternate registers. First reg maps to Send1, second
|
||||||
// to Send2, third to Send1, etc. And the following clever code does this:
|
// to Send2, third to Send1, etc. And the following clever code does this:
|
||||||
@ -617,7 +617,7 @@ void iopHwWrite32_Page8( u32 addr, mem32_t val )
|
|||||||
g_Sio2.send1[parm] = val;
|
g_Sio2.send1[parm] = val;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if( masked_addr <= 0x280 )
|
else if ( masked_addr <= 0x280 )
|
||||||
{
|
{
|
||||||
switch( masked_addr )
|
switch( masked_addr )
|
||||||
{
|
{
|
||||||
@ -661,7 +661,7 @@ void iopHwWrite32_Page8( u32 addr, mem32_t val )
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if( masked_addr >= pgmsk(HW_FW_START) && masked_addr <= pgmsk(HW_FW_END) )
|
else if ( masked_addr >= pgmsk(HW_FW_START) && masked_addr <= pgmsk(HW_FW_END) )
|
||||||
{
|
{
|
||||||
FWwrite32( addr, val );
|
FWwrite32( addr, val );
|
||||||
}
|
}
|
||||||
|
|||||||
@ -161,7 +161,7 @@ static __ri const char* _ioplog_GetHwName( u32 addr, T val )
|
|||||||
default: return "Invalid Counter";
|
default: return "Invalid Counter";
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if( addr >= 0x1f801480 && addr < 0x1f8014b0 )
|
else if ( addr >= 0x1f801480 && addr < 0x1f8014b0 )
|
||||||
{
|
{
|
||||||
switch( addr & 0xf )
|
switch( addr & 0xf )
|
||||||
{
|
{
|
||||||
@ -174,20 +174,20 @@ static __ri const char* _ioplog_GetHwName( u32 addr, T val )
|
|||||||
default: return "Invalid Counter";
|
default: return "Invalid Counter";
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if( (addr >= HW_USB_START) && (addr < HW_USB_END) )
|
else if ( (addr >= HW_USB_START) && (addr < HW_USB_END) )
|
||||||
{
|
{
|
||||||
return "USB";
|
return "USB";
|
||||||
}
|
}
|
||||||
else if( (addr >= HW_SPU2_START) && (addr < HW_SPU2_END) )
|
else if ( (addr >= HW_SPU2_START) && (addr < HW_SPU2_END) )
|
||||||
{
|
{
|
||||||
return "SPU2";
|
return "SPU2";
|
||||||
}
|
}
|
||||||
else if( addr >= pgmsk(HW_FW_START) && addr <= pgmsk(HW_FW_END) )
|
else if ( addr >= pgmsk(HW_FW_START) && addr <= pgmsk(HW_FW_END) )
|
||||||
{
|
{
|
||||||
return "FW";
|
return "FW";
|
||||||
}
|
}
|
||||||
else if( addr >= 0x1f808200 && addr < 0x1f808240 ) { return "SIO2 param"; }
|
else if ( addr >= 0x1f808200 && addr < 0x1f808240 ) { return "SIO2 param"; }
|
||||||
else if( addr >= 0x1f808240 && addr < 0x1f808260 ) { return "SIO2 send"; }
|
else if ( addr >= 0x1f808240 && addr < 0x1f808260 ) { return "SIO2 send"; }
|
||||||
|
|
||||||
return NULL; //"Unknown";
|
return NULL; //"Unknown";
|
||||||
}
|
}
|
||||||
|
|||||||
@ -648,7 +648,7 @@ static OperandType vtlbUnmappedPReadSm(u32 addr) {
|
|||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
static RETURNS_R128 vtlbUnmappedPReadLg(u32 addr) { vtlb_BusError(addr, 0); if(!CHECK_EEREC && CHECK_CACHE && CheckCache(addr)){ return readCache128(addr, false); } return r128_zero(); }
|
static RETURNS_R128 vtlbUnmappedPReadLg(u32 addr) { vtlb_BusError(addr, 0); if (!CHECK_EEREC && CHECK_CACHE && CheckCache(addr)){ return readCache128(addr, false); } return r128_zero(); }
|
||||||
|
|
||||||
template <typename OperandType>
|
template <typename OperandType>
|
||||||
static void vtlbUnmappedPWriteSm(u32 addr, OperandType data) {
|
static void vtlbUnmappedPWriteSm(u32 addr, OperandType data) {
|
||||||
@ -663,7 +663,7 @@ static void vtlbUnmappedPWriteSm(u32 addr, OperandType data) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
static void TAKES_R128 vtlbUnmappedPWriteLg(u32 addr, r128 data) { vtlb_BusError(addr, 1); if(!CHECK_EEREC && CHECK_CACHE && CheckCache(addr)) { writeCache128(addr, reinterpret_cast<mem128_t*>(&data) /*Safe??*/, false); }}
|
static void TAKES_R128 vtlbUnmappedPWriteLg(u32 addr, r128 data) { vtlb_BusError(addr, 1); if (!CHECK_EEREC && CHECK_CACHE && CheckCache(addr)) { writeCache128(addr, reinterpret_cast<mem128_t*>(&data) /*Safe??*/, false); }}
|
||||||
// clang-format on
|
// clang-format on
|
||||||
|
|
||||||
// --------------------------------------------------------------------------------------
|
// --------------------------------------------------------------------------------------
|
||||||
|
|||||||
@ -1356,7 +1356,7 @@ static void iBranchTest(u32 newpc)
|
|||||||
// Check the Event scheduler if our "cycle target" has been reached.
|
// Check the Event scheduler if our "cycle target" has been reached.
|
||||||
// Equiv code to:
|
// Equiv code to:
|
||||||
// cpuRegs.cycle += blockcycles;
|
// cpuRegs.cycle += blockcycles;
|
||||||
// if( cpuRegs.cycle > g_nextEventCycle ) { DoEvents(); }
|
// if ( cpuRegs.cycle > g_nextEventCycle ) { DoEvents(); }
|
||||||
|
|
||||||
if (EmuConfig.Speedhacks.WaitLoop && s_nBlockFF && newpc == s_branchTo)
|
if (EmuConfig.Speedhacks.WaitLoop && s_nBlockFF && newpc == s_branchTo)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -247,7 +247,7 @@ void mVUendProgram(mV, microFlagCycles* mFC, int isEbit)
|
|||||||
xAND(ptr32[&VU0.VI[REG_VPU_STAT].UL], (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
|
xAND(ptr32[&VU0.VI[REG_VPU_STAT].UL], (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if(isEbit)
|
else if (isEbit)
|
||||||
{
|
{
|
||||||
if (EmuConfig.Gamefixes.VUSyncHack || EmuConfig.Gamefixes.FullVU0SyncHack)
|
if (EmuConfig.Gamefixes.VUSyncHack || EmuConfig.Gamefixes.FullVU0SyncHack)
|
||||||
xMOV(ptr32[&mVU.regs().nextBlockCycles], 0);
|
xMOV(ptr32[&mVU.regs().nextBlockCycles], 0);
|
||||||
|
|||||||
@ -1949,7 +1949,7 @@ mVUop(mVU_B)
|
|||||||
pass2
|
pass2
|
||||||
{
|
{
|
||||||
if (mVUlow.badBranch) { xMOV(ptr32[&mVU.badBranch], branchAddr(mVU)); }
|
if (mVUlow.badBranch) { xMOV(ptr32[&mVU.badBranch], branchAddr(mVU)); }
|
||||||
if (mVUlow.evilBranch) { if(isEvilBlock) xMOV(ptr32[&mVU.evilevilBranch], branchAddr(mVU)); else xMOV(ptr32[&mVU.evilBranch], branchAddr(mVU)); }
|
if (mVUlow.evilBranch) { if (isEvilBlock) xMOV(ptr32[&mVU.evilevilBranch], branchAddr(mVU)); else xMOV(ptr32[&mVU.evilBranch], branchAddr(mVU)); }
|
||||||
mVU.profiler.EmitOp(opB);
|
mVU.profiler.EmitOp(opB);
|
||||||
}
|
}
|
||||||
pass3 { mVUlog("B [<a href=\"#addr%04x\">%04x</a>]", branchAddr(mVU), branchAddr(mVU)); }
|
pass3 { mVUlog("B [<a href=\"#addr%04x\">%04x</a>]", branchAddr(mVU), branchAddr(mVU)); }
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user