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Vif: Fixes to non-volatile SSE backup and restore logic

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TheLastRar 2025-02-06 18:26:18 +00:00 committed by Ty
parent 9b4b112a97
commit 407c989860
1 changed files with 22 additions and 8 deletions
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30
pcsx2/x86/Vif_Dynarec.cpp
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@ -39,6 +39,13 @@ __fi void makeMergeMask(u32& x)
x = ((x & 0x40) >> 6) | ((x & 0x10) >> 3) | (x & 4) | ((x & 1) << 3); x = ((x & 0x40) >> 6) | ((x & 0x10) >> 3) | (x & 4) | ((x & 1) << 3);
} }
#ifdef _WIN32
__fi void makeMergeMaskAllColumns(u32& x)
{
x = ((x & 0x40404040) >> 6) | ((x & 0x10101010) >> 3) | (x & 0x04040404) | ((x & 0x01010101) << 3);
}
#endif
__fi void VifUnpackSSE_Dynarec::SetMasks(int cS) const __fi void VifUnpackSSE_Dynarec::SetMasks(int cS) const
{ {
const int idx = v.idx; const int idx = v.idx;
@ -260,11 +267,8 @@ void VifUnpackSSE_Dynarec::CompileRoutine()
#ifdef _WIN32 #ifdef _WIN32
// See SetMasks() // See SetMasks()
const u32 m0 = vB.mask; const u32 m0 = vB.mask;
const u32 m3 = ((m0 & 0xaaaaaaaa) >> 1) & ~m0; u32 m3 = ((m0 & 0xaaaaaaaa) >> 1) & ~m0;
const u32 m2 = (m0 & 0x55555555) & (~m0 >> 1); u32 m2 = (m0 & 0x55555555) & (~m0 >> 1);
// see doMaskWrite()
const u32 m4 = (m0 & ~((m3 << 1) | m2)) & 0x55555555;
const u32 m5 = ~(m2 | m3 | m4) & 0x0f0f0f0f;
int regsUsed = 2; int regsUsed = 2;
// Allocate column registers // Allocate column registers
@ -287,26 +291,36 @@ void VifUnpackSSE_Dynarec::CompileRoutine()
// Allocate row register // Allocate row register
if ((doMask && m2) || doMode) if ((doMask && m2) || doMode)
{ {
rowReg = xRegisterSSE(regsUsed);
if (regsUsed - 6 >= 0) if (regsUsed - 6 >= 0)
nonVolatileRegs[regsUsed - 6] = rowReg; nonVolatileRegs[regsUsed - 6] = rowReg;
rowReg = xRegisterSSE(regsUsed++); regsUsed++;
} }
// see doMaskWrite()
u32 m4 = (m0 & ~((m3 << 1) | m2)) & 0x55555555;
makeMergeMaskAllColumns(m2);
makeMergeMaskAllColumns(m3);
makeMergeMaskAllColumns(m4);
const u32 m5 = ~(m2 | m3 | m4) & 0x0f0f0f0f;
// Allocate temp register // Allocate temp register
if (doMode && (doMode != 3) && if (doMode && (doMode != 3) &&
doMask && m5 != 0x0f0f0f0f) doMask && m5 != 0x0f0f0f0f)
{ {
tmpReg = xRegisterSSE(regsUsed);
if (regsUsed - 6 >= 0) if (regsUsed - 6 >= 0)
nonVolatileRegs[regsUsed - 6] = tmpReg; nonVolatileRegs[regsUsed - 6] = tmpReg;
tmpReg = xRegisterSSE(regsUsed++); regsUsed++;
} }
// Allocate zero register // Allocate zero register
if (needXmmZero) if (needXmmZero)
{ {
zeroReg = xRegisterSSE(regsUsed);
if (regsUsed - 6 >= 0) if (regsUsed - 6 >= 0)
nonVolatileRegs[regsUsed - 6] = zeroReg; nonVolatileRegs[regsUsed - 6] = zeroReg;
zeroReg = xRegisterSSE(regsUsed++); regsUsed++;
} }
regsUsed -= 6; regsUsed -= 6;