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EE: Correct addresses for counter event test

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refractionpcsx2 2025-12-09 13:08:18 +00:00
parent 2f5afc40b6
commit a88abd4aa8
2 changed files with 6 additions and 6 deletions
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10
pcsx2/R5900OpcodeImpl.cpp
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@ -526,7 +526,7 @@ void LB()
cpuRegs.GPR.r[_Rt_].SD[0] = temp; cpuRegs.GPR.r[_Rt_].SD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000) if ((addr & 0xFFFFE000) == 0x10000000)
{ {
intUpdateCPUCycles(); intUpdateCPUCycles();
intEventTest(); intEventTest();
@ -542,7 +542,7 @@ void LBU()
cpuRegs.GPR.r[_Rt_].UD[0] = temp; cpuRegs.GPR.r[_Rt_].UD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000) if ((addr & 0xFFFFE000) == 0x10000000)
{ {
intUpdateCPUCycles(); intUpdateCPUCycles();
intEventTest(); intEventTest();
@ -562,7 +562,7 @@ void LH()
cpuRegs.GPR.r[_Rt_].SD[0] = temp; cpuRegs.GPR.r[_Rt_].SD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000) if ((addr & 0xFFFFE000) == 0x10000000)
{ {
intUpdateCPUCycles(); intUpdateCPUCycles();
intEventTest(); intEventTest();
@ -582,7 +582,7 @@ void LHU()
cpuRegs.GPR.r[_Rt_].UD[0] = temp; cpuRegs.GPR.r[_Rt_].UD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000) if ((addr & 0xFFFFE000) == 0x10000000)
{ {
intUpdateCPUCycles(); intUpdateCPUCycles();
intEventTest(); intEventTest();
@ -602,7 +602,7 @@ void LW()
cpuRegs.GPR.r[_Rt_].SD[0] = (s32)temp; cpuRegs.GPR.r[_Rt_].SD[0] = (s32)temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000) if ((addr & 0xFFFFE000) == 0x10000000)
{ {
intUpdateCPUCycles(); intUpdateCPUCycles();
intEventTest(); intEventTest();

2
pcsx2/x86/ix86-32/iR5900LoadStore.cpp
View File

@ -113,7 +113,7 @@ static void recLoad(u32 bits, bool sign)
const u32 srcadr = g_cpuConstRegs[_Rs_].UL[0] + _Imm_; const u32 srcadr = g_cpuConstRegs[_Rs_].UL[0] + _Imm_;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games. // Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if (bits <= 32 && (srcadr & 0xFFFFE0000) == 0x10000000) if (bits <= 32 && (srcadr & 0xFFFFE000) == 0x10000000)
needs_flush = true; needs_flush = true;
x86reg = vtlb_DynGenReadNonQuad_Const(bits, sign, false, srcadr, alloc_cb); x86reg = vtlb_DynGenReadNonQuad_Const(bits, sign, false, srcadr, alloc_cb);