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58 lines
1.6 KiB
C++
58 lines
1.6 KiB
C++
// SPDX-FileCopyrightText: 2002-2025 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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#pragma once
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namespace x86Emitter
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{
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enum G1Type
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{
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G1Type_ADD = 0,
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G1Type_OR,
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G1Type_ADC,
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G1Type_SBB,
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G1Type_AND,
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G1Type_SUB,
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G1Type_XOR,
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G1Type_CMP
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};
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// --------------------------------------------------------------------------------------
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// xImpl_Group1
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// --------------------------------------------------------------------------------------
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struct xImpl_Group1
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{
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G1Type InstType;
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void operator()(const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()(const xIndirectVoid& to, const xRegisterInt& from) const;
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void operator()(const xRegisterInt& to, const xIndirectVoid& from) const;
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void operator()(const xRegisterInt& to, int imm) const;
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void operator()(const xIndirect64orLess& to, int imm) const;
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};
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// ------------------------------------------------------------------------
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// This class combines x86 with SSE/SSE2 logic operations (ADD, OR, and NOT).
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// Note: ANDN [AndNot] is handled below separately.
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//
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struct xImpl_G1Logic : public xImpl_Group1
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{
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xImplSimd_3Arg PS; // packed single precision
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xImplSimd_3Arg PD; // packed double precision
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};
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// ------------------------------------------------------------------------
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// This class combines x86 with SSE/SSE2 arithmetic operations (ADD/SUB).
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//
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struct xImpl_G1Arith : public xImpl_Group1
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{
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xImplSimd_3Arg PS; // packed single precision
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xImplSimd_3Arg PD; // packed double precision
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xImplSimd_3Arg SS; // scalar single precision
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xImplSimd_3Arg SD; // scalar double precision
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};
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} // End namespace x86Emitter
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