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vk: Add support for blackwell PCI IDs

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kd-11 2025-09-09 01:29:46 +03:00 committed by kd-11
parent e0249b05d2
commit 878bb12a72
2 changed files with 8 additions and 6 deletions
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13
rpcs3/Emu/RSX/VK/vkutils/chip_class.cpp
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@ -53,12 +53,13 @@ namespace vk
table.add(0x15F7, 0x15F9, chip_class::NV_pascal); // GP100 (Tesla P100)
table.add(0x1B00, 0x1D80, chip_class::NV_pascal);
table.add(0x1D81, 0x1DBA, chip_class::NV_volta);
table.add(0x1E02, 0x1F54, chip_class::NV_turing); // TU102, TU104, TU106, TU106M, TU106GL (RTX 20 series)
table.add(0x1F82, 0x1FB9, chip_class::NV_turing); // TU117, TU117M, TU117GL
table.add(0x2182, 0x21D1, chip_class::NV_turing); // TU116, TU116M, TU116GL
table.add(0x20B0, 0x20BE, chip_class::NV_ampere); // GA100
table.add(0x2204, 0x25AF, chip_class::NV_ampere); // GA10x (RTX 30 series)
table.add(0x2684, 0x27FF, chip_class::NV_lovelace); // AD102, AD103 (RTX40 series)
table.add(0x1E02, 0x1F54, chip_class::NV_turing); // TU102, TU104, TU106, TU106M, TU106GL (RTX 20 series)
table.add(0x1F82, 0x1FB9, chip_class::NV_turing); // TU117, TU117M, TU117GL
table.add(0x2182, 0x21D1, chip_class::NV_turing); // TU116, TU116M, TU116GL
table.add(0x20B0, 0x20BE, chip_class::NV_ampere); // GA100
table.add(0x2204, 0x25AF, chip_class::NV_ampere); // GA10x (RTX 30 series)
table.add(0x2684, 0x27FF, chip_class::NV_lovelace); // AD102, AD103 (RTX40 series)
table.add(0x2B85, 0x2F58, chip_class::NV_blackwell); // RTX50, RTX PRO Blackwell series
return table;
}();

1
rpcs3/Emu/RSX/VK/vkutils/chip_class.h
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@ -28,6 +28,7 @@ namespace vk
NV_turing,
NV_ampere,
NV_lovelace,
NV_blackwell,
_NV_ENUM_MAX_, // Do not insert NV enums beyond this point
// APPLE