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Fix: V_MUL_I32_I24 | V_MUL_U32_U24 (#3632)
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@ -153,7 +153,7 @@ public:
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void V_SUB_F32(const GcnInst& inst);
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void V_SUBREV_F32(const GcnInst& inst);
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void V_MUL_F32(const GcnInst& inst);
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void V_MUL_I32_I24(const GcnInst& inst);
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void V_MUL_I32_I24(const GcnInst& inst, bool is_signed);
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void V_MIN_F32(const GcnInst& inst, bool is_legacy = false);
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void V_MAX_F32(const GcnInst& inst, bool is_legacy = false);
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void V_MIN_I32(const GcnInst& inst);
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@ -29,9 +29,9 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
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case Opcode::V_MUL_F32:
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return V_MUL_F32(inst);
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case Opcode::V_MUL_I32_I24:
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return V_MUL_I32_I24(inst);
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return V_MUL_I32_I24(inst, true);
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case Opcode::V_MUL_U32_U24:
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return V_MUL_I32_I24(inst);
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return V_MUL_I32_I24(inst, false);
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case Opcode::V_MIN_LEGACY_F32:
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return V_MIN_F32(inst, true);
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case Opcode::V_MAX_LEGACY_F32:
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@ -459,9 +459,11 @@ void Translator::V_MUL_F32(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.FPMul(GetSrc<IR::F32>(inst.src[0]), GetSrc<IR::F32>(inst.src[1])));
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}
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void Translator::V_MUL_I32_I24(const GcnInst& inst) {
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const IR::U32 src0{ir.BitFieldExtract(GetSrc(inst.src[0]), ir.Imm32(0), ir.Imm32(24), true)};
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const IR::U32 src1{ir.BitFieldExtract(GetSrc(inst.src[1]), ir.Imm32(0), ir.Imm32(24), true)};
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void Translator::V_MUL_I32_I24(const GcnInst& inst, bool is_signed) {
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const IR::U32 src0{
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ir.BitFieldExtract(GetSrc(inst.src[0]), ir.Imm32(0), ir.Imm32(24), is_signed)};
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const IR::U32 src1{
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ir.BitFieldExtract(GetSrc(inst.src[1]), ir.Imm32(0), ir.Imm32(24), is_signed)};
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SetDst(inst.dst[0], ir.IMul(src0, src1));
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}
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