mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-12-23 06:58:03 +00:00
b687ae5e34
* gnmdriver: added support for gpu context reset * shader_recompiler: minor validation fixes * shader_recompiler: added `V_CMPX_GT_I32` * shader_recompiler: fix for crash on inline sampler access * compilation warnings and dead code elimination * amdgpu: fix for registers addressing * libraries: videoout: reduce logging pressure * shader_recompiler: fix for devergence scope detection
56 lines
2.8 KiB
C++
56 lines
2.8 KiB
C++
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/types.h"
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#include "video_core/amdgpu/liverpool.h"
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#include <array>
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namespace AmdGpu {
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// The following values are taken from fpPS4:
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// https://github.com/red-prig/fpPS4/blob/436b43064be4c78229500f3d3c054fc76639247d/chip/pm4_pfp.pas#L410
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//
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static constexpr std::array reg_array_default{
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0x00000000u, 0x80000000u, 0x40004000u, 0xdeadbeefu, 0x00000000u, 0x40004000u, 0x00000000u,
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0x40004000u, 0x00000000u, 0x40004000u, 0x00000000u, 0x40004000u, 0xaa99aaaau, 0x00000000u,
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0xdeadbeefu, 0xdeadbeefu, 0x80000000u, 0x40004000u, 0x00000000u, 0x00000000u, 0x80000000u,
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0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u,
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0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u,
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0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u,
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0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u, 0x40004000u, 0x80000000u,
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0x40004000u, 0x80000000u, 0x40004000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u,
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0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u,
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0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u,
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0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u,
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0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u, 0x00000000u, 0x3f800000u,
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0x2a00161au,
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};
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void Liverpool::Regs::SetDefaults() {
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std::memset(reg_array.data(), 0, reg_array.size() * sizeof(u32));
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std::memcpy(®_array[ContextRegWordOffset + 0x80], reg_array_default.data(),
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reg_array_default.size() * sizeof(u32));
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// Individual context regs values
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reg_array[ContextRegWordOffset + 0x000d] = 0x40004000u;
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reg_array[ContextRegWordOffset + 0x01b6] = 0x00000002u;
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reg_array[ContextRegWordOffset + 0x0204] = 0x00090000u;
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reg_array[ContextRegWordOffset + 0x0205] = 0x00000004u;
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reg_array[ContextRegWordOffset + 0x0295] = 0x00000100u;
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reg_array[ContextRegWordOffset + 0x0296] = 0x00000080u;
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reg_array[ContextRegWordOffset + 0x0297] = 0x00000002u;
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reg_array[ContextRegWordOffset + 0x02aa] = 0x00001000u;
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reg_array[ContextRegWordOffset + 0x02f7] = 0x00001000u;
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reg_array[ContextRegWordOffset + 0x02f9] = 0x00000005u;
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reg_array[ContextRegWordOffset + 0x02fa] = 0x3f800000u;
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reg_array[ContextRegWordOffset + 0x02fb] = 0x3f800000u;
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reg_array[ContextRegWordOffset + 0x02fc] = 0x3f800000u;
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reg_array[ContextRegWordOffset + 0x02fd] = 0x3f800000u;
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reg_array[ContextRegWordOffset + 0x0316] = 0x0000000eu;
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reg_array[ContextRegWordOffset + 0x0317] = 0x00000010u;
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}
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} // namespace AmdGpu
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