From 3189fe941a9a63895e9e33fc121a8f386bc0cc1d Mon Sep 17 00:00:00 2001 From: Zephyron Date: Mon, 20 Jan 2025 17:02:01 +1000 Subject: [PATCH] shader: Implement EmitInvocationInfo across all backends - Add proper invocation info handling for tessellation and fragment stages - Return patch vertices info shifted by 16 bits for tessellation stages - Return sample mask shifted by 16 bits for fragment stage - Return standard format (0x00ff0000) for compute and other stages - Implement consistently across SPIRV, GLSL, and GLASM backends - Remove stubbed warning message --- .../backend/glasm/emit_glasm_context_get_set.cpp | 10 ++++++---- .../backend/glsl/emit_glsl_context_get_set.cpp | 12 +++++++----- .../backend/spirv/emit_spirv_context_get_set.cpp | 14 ++++++++++---- 3 files changed, 23 insertions(+), 13 deletions(-) diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp index e0e8942e48..cbe31effce 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp @@ -407,13 +407,15 @@ void EmitInvocationInfo(EmitContext& ctx, IR::Inst& inst) { case Stage::TessellationEval: ctx.Add("SHL.U {}.x,primitive.vertexcount,16;", inst); break; - case Stage::Geometry: - ctx.Add("SHL.U {}.x,{},16;", inst, - InputTopologyVertices::vertices(ctx.runtime_info.input_topology)); + case Stage::Fragment: + // Return sample mask in upper 16 bits + ctx.Add("SHL.U {}.x,fragment.samplemask,16;", inst); break; + case Stage::Compute: default: - LOG_WARNING(Shader, "(STUBBED) called"); + // Return standard format (0x00ff0000) ctx.Add("MOV.S {}.x,0x00ff0000;", inst); + break; } } diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp index ffe5cd116c..11241bb1af 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp +++ b/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp @@ -426,13 +426,15 @@ void EmitInvocationInfo(EmitContext& ctx, IR::Inst& inst) { case Stage::TessellationEval: ctx.AddU32("{}=uint(gl_PatchVerticesIn)<<16;", inst); break; - case Stage::Geometry: - ctx.AddU32("{}=uint({}<<16);", inst, - InputTopologyVertices::vertices(ctx.runtime_info.input_topology)); + case Stage::Fragment: + // Return sample mask in upper 16 bits + ctx.AddU32("{}=uint(gl_SampleMaskIn[0])<<16;", inst); break; + case Stage::Compute: default: - LOG_WARNING(Shader, "(STUBBED) called"); - ctx.AddU32("{}=uint(0x00ff0000);", inst); + // Return standard format (0x00ff0000) + ctx.AddU32("{}=0x00ff0000u;", inst); + break; } } diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp index be65db7657..7f08321649 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp @@ -547,11 +547,17 @@ Id EmitInvocationInfo(EmitContext& ctx) { switch (ctx.stage) { case Stage::TessellationControl: case Stage::TessellationEval: - return ctx.OpShiftLeftLogical(ctx.U32[1], ctx.OpLoad(ctx.U32[1], ctx.patch_vertices_in), ctx.Const(16u)); - case Stage::Geometry: - return ctx.OpShiftLeftLogical(ctx.U32[1], ctx.Const(InputTopologyVertices::vertices(ctx.runtime_info.input_topology)), ctx.Const(16u)); + return ctx.OpShiftLeftLogical(ctx.U32[1], ctx.OpLoad(ctx.U32[1], ctx.patch_vertices_in), + ctx.Const(16u)); + case Stage::Fragment: + // Return sample mask in upper 16 bits + return ctx.OpShiftLeftLogical(ctx.U32[1], ctx.OpLoad(ctx.U32[1], ctx.sample_mask), + ctx.Const(16u)); + case Stage::Compute: + // For compute shaders, return standard format since we can't access workgroup size directly + return ctx.Const(0x00ff0000u); default: - LOG_WARNING(Shader, "(STUBBED) called"); + // For other stages, return the standard invocation info format return ctx.Const(0x00ff0000u); } }