dahjah/pcsx2
1
0
Fork 0
mirror of https://github.com/PCSX2/pcsx2.git synced 2025-12-16 04:08:48 +00:00
Code Issues Actions 8 Packages Projects Releases Wiki Activity

EE: Force sync on EE timer read

Browse Source
This commit is contained in:
refractionpcsx2 2025-11-22 07:39:17 +00:00 committed by Ty
parent 94bd268a51
commit 02f0921b2d
4 changed files with 50 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
pcsx2/Interpreter.cpp
View File

@ -24,7 +24,7 @@ static bool intExitExecution = false;
static fastjmp_buf intJmpBuf; static fastjmp_buf intJmpBuf;
static u32 intLastBranchTo; static u32 intLastBranchTo;
static void intEventTest(); void intEventTest();
void intUpdateCPUCycles() void intUpdateCPUCycles()
{ {
@ -548,7 +548,7 @@ static void intReset()
branch2 = 0; branch2 = 0;
} }
static void intEventTest() void intEventTest()
{ {
// Perform counters, ints, and IOP updates: // Perform counters, ints, and IOP updates:
_cpuEventTest_Shared(); _cpuEventTest_Shared();

1
pcsx2/R5900.h
View File

@ -283,6 +283,7 @@ static fpuRegisters& fpuRegs = _cpuRegistersPack.fpuRegs;
extern bool eeEventTestIsActive; extern bool eeEventTestIsActive;
void intUpdateCPUCycles(); void intUpdateCPUCycles();
void intEventTest();
void intSetBranch(); void intSetBranch();
// This is a special form of the interpreter's doBranch that is run from various // This is a special form of the interpreter's doBranch that is run from various

35
pcsx2/R5900OpcodeImpl.cpp
View File

@ -524,6 +524,13 @@ void LB()
if (!_Rt_) return; if (!_Rt_) return;
cpuRegs.GPR.r[_Rt_].SD[0] = temp; cpuRegs.GPR.r[_Rt_].SD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000)
{
intUpdateCPUCycles();
intEventTest();
}
} }
void LBU() void LBU()
@ -533,6 +540,13 @@ void LBU()
if (!_Rt_) return; if (!_Rt_) return;
cpuRegs.GPR.r[_Rt_].UD[0] = temp; cpuRegs.GPR.r[_Rt_].UD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000)
{
intUpdateCPUCycles();
intEventTest();
}
} }
void LH() void LH()
@ -546,6 +560,13 @@ void LH()
if (!_Rt_) return; if (!_Rt_) return;
cpuRegs.GPR.r[_Rt_].SD[0] = temp; cpuRegs.GPR.r[_Rt_].SD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000)
{
intUpdateCPUCycles();
intEventTest();
}
} }
void LHU() void LHU()
@ -559,6 +580,13 @@ void LHU()
if (!_Rt_) return; if (!_Rt_) return;
cpuRegs.GPR.r[_Rt_].UD[0] = temp; cpuRegs.GPR.r[_Rt_].UD[0] = temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000)
{
intUpdateCPUCycles();
intEventTest();
}
} }
void LW() void LW()
@ -572,6 +600,13 @@ void LW()
if (!_Rt_) return; if (!_Rt_) return;
cpuRegs.GPR.r[_Rt_].SD[0] = (s32)temp; cpuRegs.GPR.r[_Rt_].SD[0] = (s32)temp;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if ((addr & 0xFFFFE0000) == 0x10000000)
{
intUpdateCPUCycles();
intEventTest();
}
} }
void LWU() void LWU()

12
pcsx2/x86/ix86-32/iR5900LoadStore.cpp
View File

@ -107,9 +107,15 @@ static void recLoad(u32 bits, bool sign)
alloc_cb = []() { return _allocX86reg(X86TYPE_GPR, _Rt_, MODE_WRITE); }; alloc_cb = []() { return _allocX86reg(X86TYPE_GPR, _Rt_, MODE_WRITE); };
int x86reg; int x86reg;
bool needs_flush = false;
if (GPR_IS_CONST1(_Rs_)) if (GPR_IS_CONST1(_Rs_))
{ {
const u32 srcadr = g_cpuConstRegs[_Rs_].UL[0] + _Imm_; const u32 srcadr = g_cpuConstRegs[_Rs_].UL[0] + _Imm_;
// Force event test on EE counter read to improve read + interrupt syncing. Namely ESPN Games.
if (bits <= 32 && (srcadr & 0xFFFFE0000) == 0x10000000)
needs_flush = true;
x86reg = vtlb_DynGenReadNonQuad_Const(bits, sign, false, srcadr, alloc_cb); x86reg = vtlb_DynGenReadNonQuad_Const(bits, sign, false, srcadr, alloc_cb);
} }
else else
@ -127,6 +133,12 @@ static void recLoad(u32 bits, bool sign)
pxAssert(!_Rt_ || !GPR_IS_CONST1(_Rt_)); pxAssert(!_Rt_ || !GPR_IS_CONST1(_Rt_));
if (!_Rt_) if (!_Rt_)
_freeX86reg(x86reg); _freeX86reg(x86reg);
if (bits <= 32 && needs_flush)
{
iFlushCall(FLUSH_INTERPRETER);
g_branch = 2;
}
} }
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////